Testing backport of V2 components
This commit is contained in:
parent
6f0bed74d2
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7 changed files with 661 additions and 94 deletions
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@ -12,7 +12,7 @@ set(CMAKE_C_COMPILER "clang")
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set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
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cmake_minimum_required(VERSION 3.18)
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project(${PROJ_NAME} LANGUAGES C CXX)
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set(CMAKE_CXX_STANDARD 20)
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set(CMAKE_CXX_STANDARD 23)
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file(STRINGS "./other/build.nr" BUILD_NUMBER)
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#-----------------------------------------------------------------------------------------
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@ -1 +1 @@
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1646
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1648
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143
src/hardware/BUS.cpp
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143
src/hardware/BUS.cpp
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@ -0,0 +1,143 @@
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/*
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DragonV2 - A collection of useful functionality
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Copyright (C) 2026 OmniaX-Dev
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This file is part of DragonV2.
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DragonV2 is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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DragonV2 is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with DragonV2. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include "BUS.hpp"
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namespace dragon
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{
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AtomicStorageMemoryDevice::AtomicStorageMemoryDevice(u64 size)
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{
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if (size == 0) // Special case, for classes like BUS, that are MemoryDevices but don't own any data
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{
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m_wordCount = 0;
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m_size = 0;
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m_words = nullptr;
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return;
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}
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m_wordCount = (size + 7) / 8; // Round up to multiple of 8 bytes for the word-granular backing
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m_size = size;
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m_words = new std::atomic<u64>[m_wordCount];
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for (u64 i = 0; i < m_wordCount; ++i)
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m_words[i].store(0, std::memory_order_relaxed);
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}
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AtomicStorageMemoryDevice::~AtomicStorageMemoryDevice(void)
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{
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delete[] m_words;
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}
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bool MemoryDevice::guest_cas_u32(AddressType addr, u32 expected, u32& actual, u32 desired)
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{
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data::ErrorHandler::pushError(data::ErrorCodes::MM_AtomicNotSupported, "MemoryDevice::guest_cas_u32: atomic not supported: ");
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fault(addr, data::ExceptionCause::AtomicNotSupported, "MemoryDevice::guest_cas_u32");
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return false;
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}
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namespace hw
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{
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bool BUS::guest_cas_u32(AddressType addr, u32 expected, u32& actual, u32 desired)
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{
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auto region = findRegion(addr);
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if (!region) { /* fault */ return false; }
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AddressType finalAddr = (region->remap ? addr - region->startAddress : addr);
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return region->device->guest_cas_u32(finalAddr, expected, actual, desired);
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}
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u8 BUS::load_u8(AddressType addr) const
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{
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auto region = findRegion(addr);
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if (region == nullptr) return 0x00; //TODO: Error
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AddressType finalAddr = (region->remap ? addr - region->startAddress : addr);
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return region->device->load_u8(finalAddr);
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}
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u16 BUS::load_u16(AddressType addr) const
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{
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auto region = findRegion(addr);
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if (region == nullptr) return 0x0000; //TODO: Error
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AddressType finalAddr = (region->remap ? addr - region->startAddress : addr);
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return region->device->load_u16(finalAddr);
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}
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u32 BUS::load_u32(AddressType addr) const
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{
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auto region = findRegion(addr);
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if (region == nullptr) return 0x0000'0000; //TODO: Error
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AddressType finalAddr = (region->remap ? addr - region->startAddress : addr);
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return region->device->load_u32(finalAddr);
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}
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u64 BUS::load_u64(AddressType addr) const
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{
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auto region = findRegion(addr);
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if (region == nullptr) return 0x0000'0000'0000'0000; //TODO: Error
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AddressType finalAddr = (region->remap ? addr - region->startAddress : addr);
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return region->device->load_u64(finalAddr);
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}
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bool BUS::store_u8(AddressType addr, u8 value)
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{
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auto region = findRegion(addr);
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if (region == nullptr) return false;
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AddressType finalAddr = (region->remap ? addr - region->startAddress : addr);
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return region->device->store_u8(finalAddr, value);
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}
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bool BUS::store_u16(AddressType addr, u16 value)
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{
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auto region = findRegion(addr);
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if (region == nullptr) return false;
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AddressType finalAddr = (region->remap ? addr - region->startAddress : addr);
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return region->device->store_u16(finalAddr, value);
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}
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bool BUS::store_u32(AddressType addr, u32 value)
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{
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auto region = findRegion(addr);
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if (region == nullptr) return false;
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AddressType finalAddr = (region->remap ? addr - region->startAddress : addr);
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return region->device->store_u32(finalAddr, value);
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}
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bool BUS::store_u64(AddressType addr, u64 value)
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{
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auto region = findRegion(addr);
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if (region == nullptr) return false;
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AddressType finalAddr = (region->remap ? addr - region->startAddress : addr);
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return region->device->store_u64(finalAddr, value);
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}
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void BUS::mapDevice(MemoryDevice& device, AddressType startAddr, AddressType endAddr, bool remap, ostd::String name)
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{
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m_regions.push_back({ &device, startAddr, endAddr, remap, name });
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}
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ostd::String BUS::getMemoryRegionName(AddressType address)
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{
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tMemoryRegion* region = findRegion(address);
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if (region == nullptr) return "Invalid";
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return region->name;
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}
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}
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}
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142
src/hardware/BUS.hpp
Normal file
142
src/hardware/BUS.hpp
Normal file
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@ -0,0 +1,142 @@
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/*
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DragonV2 - A collection of useful functionality
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Copyright (C) 2026 OmniaX-Dev
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This file is part of DragonV2.
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DragonV2 is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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DragonV2 is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with DragonV2. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include <ostd/data/BaseObject.hpp>
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#include <atomic>
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#include <span>
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#include "../tools/GlobalData.hpp"
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#pragma once
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namespace dragon
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{
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class MemoryDevice : public ostd::BaseObject
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{
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public:
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MemoryDevice(void) = default;
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MemoryDevice(const MemoryDevice&) = delete;
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MemoryDevice& operator=(const MemoryDevice&) = delete;
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MemoryDevice(MemoryDevice&&) = delete;
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MemoryDevice& operator=(MemoryDevice&&) = delete;
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virtual ~MemoryDevice() = default;
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virtual bool guest_cas_u32(AddressType addr, u32 expected, u32& actual, u32 desired);
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// ---- Aligned loads ----
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virtual u64 load_u64(AddressType addr) const = 0;
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virtual u32 load_u32(AddressType addr) const = 0;
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virtual u16 load_u16(AddressType addr) const = 0;
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virtual u8 load_u8 (AddressType addr) const = 0;
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inline i64 load_i64(AddressType addr) const { return cast<i64>(load_u64(addr)); }
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inline i32 load_i32(AddressType addr) const { return cast<i32>(load_u32(addr)); }
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inline i16 load_i16(AddressType addr) const { return cast<i16>(load_u16(addr)); }
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inline i8 load_i8 (AddressType addr) const { return cast<i8 >(load_u8 (addr)); }
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// ---- Aligned stores ----
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virtual bool store_u64(AddressType addr, u64 value) = 0;
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virtual bool store_u32(AddressType addr, u32 value) = 0;
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virtual bool store_u16(AddressType addr, u16 value) = 0;
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virtual bool store_u8 (AddressType addr, u8 value) = 0;
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inline bool store_i64(AddressType addr, u64 value) { return store_u64(addr, cast<i64>(value)); }
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inline bool store_i32(AddressType addr, u32 value) { return store_u32(addr, cast<i32>(value)); }
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inline bool store_i16(AddressType addr, u16 value) { return store_u16(addr, cast<i16>(value)); }
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inline bool store_i8 (AddressType addr, u8 value) { return store_u8 (addr, cast<i8 >(value)); }
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[[noreturn]] virtual void fault(AddressType addr, data::ExceptionCause cause, const String& msg = "") const { throw data::GuestException{ cause, addr, msg }; }; // Message can be useful for debugging
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};
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class AtomicStorageMemoryDevice : public MemoryDevice
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{
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public:
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explicit AtomicStorageMemoryDevice(u64 size);
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virtual ~AtomicStorageMemoryDevice(void);
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AtomicStorageMemoryDevice(const AtomicStorageMemoryDevice&) = delete;
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AtomicStorageMemoryDevice& operator=(const AtomicStorageMemoryDevice&) = delete;
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AtomicStorageMemoryDevice(AtomicStorageMemoryDevice&&) = delete;
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AtomicStorageMemoryDevice& operator=(AtomicStorageMemoryDevice&&) = delete;
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// ---- Helpers ----
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inline u64 getWordCount(void) const { return m_wordCount; }
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inline u64 getSize(void) const { return m_size; }
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inline virtual std::span<std::atomic<u64>> getRawData(void) { return { m_words, m_size }; }
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inline virtual std::span<const std::atomic<u64>> getRawData(void) const { return { m_words, m_size }; }
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// Both getRawData() can be overridden to return empty spans for devices where internal memory shouldn't be exposed
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protected:
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std::atomic<u64>* m_words;
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u64 m_wordCount;
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u64 m_size;
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};
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namespace hw
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{
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class BUS : public MemoryDevice
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{
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public:
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private: struct tMemoryRegion
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{
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MemoryDevice* device { nullptr };
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AddressType startAddress { 0x0000'0000 };
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AddressType endAddress { 0x0000'0000 };
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bool remap { false };
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ostd::String name { "" };
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};
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public:
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BUS(void) = default;
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bool guest_cas_u32(AddressType addr, u32 expected, u32& actual, u32 desired) override;
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// ---- Aligned loads ----
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u64 load_u64(AddressType addr) const override;
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u32 load_u32(AddressType addr) const override;
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u16 load_u16(AddressType addr) const override;
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u8 load_u8 (AddressType addr) const override;
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// ---- Aligned stores ----
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bool store_u64(AddressType addr, u64 value) override;
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bool store_u32(AddressType addr, u32 value) override;
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bool store_u16(AddressType addr, u16 value) override;
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bool store_u8 (AddressType addr, u8 value) override;
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void mapDevice(MemoryDevice& device, AddressType startAddr, AddressType endAddr, bool remap = false, ostd::String name = "");
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ostd::String getMemoryRegionName(AddressType address);
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private:
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template <typename Self>
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auto findRegion(this Self&& self, AddressType address)
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{
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for (auto& region : self.m_regions)
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{ // works whether self is const or not
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if (address >= region.startAddress && address <= region.endAddress)
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return ®ion;
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}
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data::ErrorHandler::pushError(data::ErrorCodes::MM_RegionNotFound, "Memory device not found");
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return decltype(&self.m_regions[0]){nullptr};
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}
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private:
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std::vector<tMemoryRegion> m_regions;
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private:
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};
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}
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}
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172
src/hardware/RAM.cpp
Normal file
172
src/hardware/RAM.cpp
Normal file
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@ -0,0 +1,172 @@
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/*
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DragonV2 - A collection of useful functionality
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Copyright (C) 2026 OmniaX-Dev
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This file is part of DragonV2.
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DragonV2 is free software: you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation, either version 3 of the License, or
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(at your option) any later version.
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DragonV2 is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with DragonV2. If not, see <https://www.gnu.org/licenses/>.
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*/
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#include "RAM.hpp"
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#include <ostd/string/String.hpp>
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#define DRAGON_TEST_FOR_MISALIGNED_OR_BOUNDS_FAULT_R(size, msg) \
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if (addr + size > m_size) \
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{ \
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fault(addr, data::ExceptionCause::LoadBounds, msg); \
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return 0; \
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} \
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if (addr & (size - 1)) \
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{ \
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fault(addr, data::ExceptionCause::MisalignedLoad, msg); \
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return 0; \
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} \
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#define DRAGON_TEST_FOR_MISALIGNED_OR_BOUNDS_FAULT_W(size, msg) \
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if (addr + size > m_size) \
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{ \
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fault(addr, data::ExceptionCause::StoreBounds, msg); \
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return false; \
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} \
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if (addr & (size - 1)) \
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{ \
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fault(addr, data::ExceptionCause::MisalignedStore, msg); \
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return false; \
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} \
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namespace dragon
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{
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namespace hw
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{
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bool RAM::guest_cas_u32(AddressType addr, u32 expected, u32& actual, u32 desired)
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{
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DRAGON_TEST_FOR_MISALIGNED_OR_BOUNDS_FAULT_R(4, "RAM::guest_cas_u32");
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u32 shift = (addr & 4) * 8;
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u64 mask = u64(0xFFFFFFFFu) << shift;
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std::atomic<u64>& word = m_words[addr >> 3];
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u64 word_expected = word.load(std::memory_order_seq_cst);
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while (true)
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{
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u32 current_in_slot = static_cast<u32>(word_expected >> shift);
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if (current_in_slot != expected)
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{
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// CAS fails: report what we saw, don't modify
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actual = current_in_slot;
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return false;
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}
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// CAS could succeed: try to update
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u64 word_desired = (word_expected & ~mask) | (u64(desired) << shift);
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if (word.compare_exchange_weak(word_expected, word_desired, std::memory_order_seq_cst, std::memory_order_seq_cst))
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{
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actual = expected; // tell caller we succeeded
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return true;
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}
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// CAS spuriously failed or someone else changed the word; word_expected
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// is updated. Loop and re-check.
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}
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}
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u64 RAM::load_u64(AddressType addr) const
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{
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DRAGON_TEST_FOR_MISALIGNED_OR_BOUNDS_FAULT_R(8, "RAM::load_u64");
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return m_words[addr >> 3].load(std::memory_order_seq_cst);
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}
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u32 RAM::load_u32(AddressType addr) const
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{
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DRAGON_TEST_FOR_MISALIGNED_OR_BOUNDS_FAULT_R(4, "RAM::load_u32");
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u64 word = m_words[addr >> 3].load(std::memory_order_seq_cst);
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u32 shift = (addr & 4) * 8; // 0 or 32
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return static_cast<u32>(word >> shift);
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}
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u16 RAM::load_u16(AddressType addr) const
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{
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DRAGON_TEST_FOR_MISALIGNED_OR_BOUNDS_FAULT_R(2, "RAM::load_u16");
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u64 word = m_words[addr >> 3].load(std::memory_order_seq_cst);
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u32 shift = (addr & 6) * 8; // 0, 16, 32, or 48
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return static_cast<u16>(word >> shift);
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}
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u8 RAM::load_u8(AddressType addr) const
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{
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if (addr >= m_size)
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{
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fault(addr, data::ExceptionCause::LoadBounds, "RAM::load_u8");
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return 0;
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}
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u64 word = m_words[addr >> 3].load(std::memory_order_seq_cst);
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u32 shift = (addr & 7) * 8;
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return static_cast<u8>(word >> shift);
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}
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bool RAM::store_u64(AddressType addr, u64 value)
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{
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DRAGON_TEST_FOR_MISALIGNED_OR_BOUNDS_FAULT_W(8, "RAM::store_u64");
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m_words[addr >> 3].store(value, std::memory_order_seq_cst);
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return true;
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}
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bool RAM::store_u32(AddressType addr, u32 value)
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{
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DRAGON_TEST_FOR_MISALIGNED_OR_BOUNDS_FAULT_W(4, "RAM::store_u32");
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u32 shift = (addr & 4) * 8;
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u64 mask = u64(0xFFFFFFFFu) << shift;
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std::atomic<u64>& word = m_words[addr >> 3];
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u64 expected = word.load(std::memory_order_relaxed);
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u64 desired;
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do
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{
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desired = (expected & ~mask) | (u64(value) << shift);
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} while (!word.compare_exchange_weak(expected, desired, std::memory_order_seq_cst, std::memory_order_relaxed));
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return true;
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}
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bool RAM::store_u16(AddressType addr, u16 value)
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{
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DRAGON_TEST_FOR_MISALIGNED_OR_BOUNDS_FAULT_W(2, "RAM::store_u16");
|
||||
u32 shift = (addr & 6) * 8;
|
||||
u64 mask = u64(0xFFFFu) << shift;
|
||||
std::atomic<u64>& word = m_words[addr >> 3];
|
||||
u64 expected = word.load(std::memory_order_relaxed);
|
||||
u64 desired;
|
||||
do
|
||||
{
|
||||
desired = (expected & ~mask) | (u64(value) << shift);
|
||||
} while (!word.compare_exchange_weak(expected, desired, std::memory_order_seq_cst, std::memory_order_relaxed));
|
||||
return true;
|
||||
}
|
||||
|
||||
bool RAM::store_u8(AddressType addr, u8 value)
|
||||
{
|
||||
if (addr >= m_size)
|
||||
{
|
||||
fault(addr, data::ExceptionCause::StoreBounds, "RAM::store_u8");
|
||||
return false;
|
||||
}
|
||||
u32 shift = (addr & 7) * 8;
|
||||
u64 mask = u64(0xFFu) << shift;
|
||||
std::atomic<u64>& word = m_words[addr >> 3];
|
||||
u64 expected = word.load(std::memory_order_relaxed);
|
||||
u64 desired;
|
||||
do
|
||||
{
|
||||
desired = (expected & ~mask) | (u64(value) << shift);
|
||||
} while (!word.compare_exchange_weak(expected, desired, std::memory_order_seq_cst, std::memory_order_relaxed));
|
||||
return true;
|
||||
}
|
||||
}
|
||||
}
|
||||
51
src/hardware/RAM.hpp
Normal file
51
src/hardware/RAM.hpp
Normal file
|
|
@ -0,0 +1,51 @@
|
|||
/*
|
||||
DragonV2 - A collection of useful functionality
|
||||
Copyright (C) 2026 OmniaX-Dev
|
||||
|
||||
This file is part of DragonV2.
|
||||
|
||||
DragonV2 is free software: you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation, either version 3 of the License, or
|
||||
(at your option) any later version.
|
||||
|
||||
DragonV2 is distributed in the hope that it will be useful,
|
||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
GNU General Public License for more details.
|
||||
|
||||
You should have received a copy of the GNU General Public License
|
||||
along with DragonV2. If not, see <https://www.gnu.org/licenses/>.
|
||||
*/
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <ostd/data/Types.hpp>
|
||||
|
||||
#include "BUS.hpp"
|
||||
|
||||
namespace dragon
|
||||
{
|
||||
namespace hw
|
||||
{
|
||||
class RAM : public AtomicStorageMemoryDevice
|
||||
{
|
||||
public:
|
||||
explicit RAM(u64 size) : AtomicStorageMemoryDevice(size) { }
|
||||
|
||||
bool guest_cas_u32(AddressType addr, u32 expected, u32& actual, u32 desired) override;
|
||||
|
||||
// ---- Aligned loads ----
|
||||
u64 load_u64(AddressType addr) const override;
|
||||
u32 load_u32(AddressType addr) const override;
|
||||
u16 load_u16(AddressType addr) const override;
|
||||
u8 load_u8 (AddressType addr) const override;
|
||||
|
||||
// ---- Aligned stores ----
|
||||
bool store_u64(AddressType addr, u64 value) override;
|
||||
bool store_u32(AddressType addr, u32 value) override;
|
||||
bool store_u16(AddressType addr, u16 value) override;
|
||||
bool store_u8 (AddressType addr, u8 value) override;
|
||||
};
|
||||
}
|
||||
}
|
||||
|
|
@ -5,6 +5,7 @@
|
|||
|
||||
namespace dragon
|
||||
{
|
||||
using AddressType = u16;
|
||||
namespace hw { class VirtualCPU; }
|
||||
namespace data
|
||||
{
|
||||
|
|
@ -17,6 +18,7 @@ namespace dragon
|
|||
inline static constexpr uint64_t AccessViolation_BiosModeRequired = 0x0000000000000001;
|
||||
|
||||
inline static constexpr uint64_t MM_RegionNotFound = 0x1000000000000000;
|
||||
inline static constexpr uint64_t MM_AtomicNotSupported = 0x1000000000000001;
|
||||
|
||||
inline static constexpr uint64_t CPU_UnknownInstruction = 0x2000000000000000;
|
||||
inline static constexpr uint64_t CPU_UnsupportedExtension = 0x2000000000000001;
|
||||
|
|
@ -58,6 +60,63 @@ namespace dragon
|
|||
|
||||
};
|
||||
|
||||
enum class ExceptionCause : u32
|
||||
{
|
||||
// === Instruction fetch faults ===
|
||||
MisalignedFetch = 0x0000'0000, // PC not aligned to instruction boundary
|
||||
InstructionBounds = 0x0000'0001, // PC outside any mapped region
|
||||
InstructionPageFault = 0x0000'0002, // virt page not mapped (MMU on) or no X permission
|
||||
InstructionPrivPageFault = 0x0000'0003, // privileged virt page not mapped (MMU on) or no X permission
|
||||
UnknownInstruction = 0x0000'0004, // decoded opcode is not valid
|
||||
|
||||
// === Privilege ===
|
||||
PrivilegeViolation = 0x0000'1000, // user mode executed a [PRIV] instruction
|
||||
|
||||
// === Memory access faults (loads) ===
|
||||
MisalignedLoad = 0x0000'2000, // load address not naturally aligned
|
||||
LoadBounds = 0x0000'2001, // load address outside mapped region
|
||||
LoadPageFault = 0x0000'2002, // virt page not mapped or no R permission
|
||||
LoadPrivPageFault = 0x0000'2003, // virt page not mapped or no R permission
|
||||
|
||||
// === Memory access faults (stores) ===
|
||||
MisalignedStore = 0x0000'3000,
|
||||
StoreBounds = 0x0000'3001,
|
||||
StorePageFault = 0x0000'3002, // virt page not mapped or no W permission
|
||||
StorePrivPageFault = 0x0000'3003, // virt page not mapped or no W permission
|
||||
|
||||
// === Atomic op faults ===
|
||||
AtomicNotSupported = 0x0000'4000, // CAS/XADD/XCHG on a device that can't (ROM, MMIO)
|
||||
|
||||
// === Arithmetic ===
|
||||
DivideByZero = 0x0000'5000,
|
||||
|
||||
// === MMIO ===
|
||||
BusUnmapped = 0x0000'6000,
|
||||
ReadOnlyViolation = 0x0000'6001,
|
||||
|
||||
// === Deliberate guest-initiated traps ===
|
||||
Syscall = 0x0000'7000, // syscall instruction
|
||||
SoftwareInt = 0x0000'7001, // int N instruction
|
||||
TrapInstruction = 0x0000'7002, // explicit trap instr
|
||||
Breakpoint = 0x0000'7003, // brk for debugger
|
||||
|
||||
// === Asynchronous (external) ===
|
||||
HardwareInterrupt = 0x0000'F000, // generic external IRQ; details in INT controller
|
||||
|
||||
// === Catastrophic ===
|
||||
DoubleFault = 0x000F'FFFF, // exception while handling exception
|
||||
|
||||
// Just in case
|
||||
NoFault = 0xFFFF'FFFF,
|
||||
};
|
||||
|
||||
struct GuestException
|
||||
{
|
||||
ExceptionCause cause;
|
||||
AddressType fault_addr; // VA for translation faults, PA for bus faults, 0 otherwise
|
||||
String msg; // For debug
|
||||
};
|
||||
|
||||
class ErrorHandler
|
||||
{
|
||||
public: struct tError
|
||||
|
|
|
|||
Loading…
Reference in a new issue