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[0.2.1588] - Fully implemented ExtMov CPU extension

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This commit is contained in:
OmniaX-dev 2024-03-30 22:01:44 +01:00
parent 56e12f9949
commit c9014b99b0
8 changed files with 358 additions and 48 deletions
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2
build.nr
View file

@ -1 +1 @@
1588 1589

2
compile
View file

@ -6,6 +6,7 @@ if [ "$(expr substr $(uname -s) 1 5)" == "Linux" ]; then
cmake -B bin -S ./ cmake -B bin -S ./
cd bin cd bin
make make
mkdir disassembly
if [ $? -eq 0 ]; then if [ $? -eq 0 ]; then
cd .. cd ..
typeset -i build_number=$(cat build.nr) typeset -i build_number=$(cat build.nr)
@ -19,6 +20,7 @@ elif [ "$(expr substr $(uname -s) 1 10)" == "MINGW64_NT" ]; then
cmake -B bin -S ./ -G "MinGW Makefiles" cmake -B bin -S ./ -G "MinGW Makefiles"
cd bin cd bin
mingw32-make.exe mingw32-make.exe
mkdir disassembly
if [ $? -eq 0 ]; then if [ $? -eq 0 ]; then
cd .. cd ..
typeset -i build_number=$(cat build.nr) typeset -i build_number=$(cat build.nr)

38
extra/dragon info/todo.txt
View file

@ -6,7 +6,7 @@ Add possibility to specify required instruction sets in dasm
#***Add "Extended mov" instruction set #***Add "Extended mov" instruction set
#***Remove old offset mov #***Remove old offset mov
Implelemnt Instructions in dasm: #***Implelemnt extmov mnemonics in dasm:
## Offset on first operand ## Offset on first operand
## omov *R1, 0xFAAB, word 4 ## Move word immediate into (deref reg + immediate offset word) ## omov *R1, 0xFAAB, word 4 ## Move word immediate into (deref reg + immediate offset word)
@ -35,26 +35,26 @@ Implelemnt Instructions in dasm:
## Offset on second operand ## Offset on second operand
movo *R1, *R2, word 4 ## Move word (deref reg + immediate offset word) into deref reg ## movo *R1, *R2, word 4 ## Move word (deref reg + immediate offset word) into deref reg
movo *R1, *R2, R10 ## Move word (deref reg + reg offset) into deref reg ## movo *R1, *R2, R10 ## Move word (deref reg + reg offset) into deref reg
movo *R1, *R2, 4 ## Move word (deref reg + immediate offset byte) into deref reg ## movo *R1, *R2, 4 ## Move word (deref reg + immediate offset byte) into deref reg
movbo *R1, *R2, word 4 ## Move byte (deref reg + immediate offset word) into deref reg ## movbo *R1, *R2, word 4 ## Move byte (deref reg + immediate offset word) into deref reg
movbo *R1, *R2, R10 ## Move byte (deref reg + reg offset) into deref reg ## movbo *R1, *R2, R10 ## Move byte (deref reg + reg offset) into deref reg
movbo *R1, *R2, 4 ## Move byte (deref reg + immediate offset byte) into deref reg ## movbo *R1, *R2, 4 ## Move byte (deref reg + immediate offset byte) into deref reg
movo R1, [0xFAAB], word 4 ## Move word (Memory + immediate offset word) into reg ## movo R1, [0xFAAB], word 4 ## Move word (Memory + immediate offset word) into reg
movo R1, [0xFAAB], R10 ## Move word (Memory + reg offset) into reg ## movo R1, [0xFAAB], R10 ## Move word (Memory + reg offset) into reg
movo R1, [0xFAAB], 4 ## Move word (Memory + immediate offset byte) into reg ## movo R1, [0xFAAB], 4 ## Move word (Memory + immediate offset byte) into reg
movbo R1, [0xFAAB], word 4 ## Move byte (Memory + immediate offset word) into reg ## movbo R1, [0xFAAB], word 4 ## Move byte (Memory + immediate offset word) into reg
movbo R1, [0xFAAB], R10 ## Move byte (Memory + reg offset) into reg ## movbo R1, [0xFAAB], R10 ## Move byte (Memory + reg offset) into reg
movbo R1, [0xFAAB], 4 ## Move byte (Memory + immediate offset byte) into reg ## movbo R1, [0xFAAB], 4 ## Move byte (Memory + immediate offset byte) into reg
movo R1, *R2, word 4 ## Move word (deref reg + immediate offset word) into reg ## movo R1, *R2, word 4 ## Move word (deref reg + immediate offset word) into reg
movo R1, *R2, R10 ## Move word (deref reg + reg offset) into reg ## movo R1, *R2, R10 ## Move word (deref reg + reg offset) into reg
movo R1, *R2, 4 ## Move word (deref reg + immediate offset byte) into reg ## movo R1, *R2, 4 ## Move word (deref reg + immediate offset byte) into reg
movbo R1, *R2, word 4 ## Move byte (deref reg + immediate offset word) into reg ## movbo R1, *R2, word 4 ## Move byte (deref reg + immediate offset word) into reg
movbo R1, *R2, R10 ## Move byte (deref reg + reg offset) into reg ## movbo R1, *R2, R10 ## Move byte (deref reg + reg offset) into reg
movbo R1, *R2, 4 ## Move byte (deref reg + immediate offset byte) into reg ## movbo R1, *R2, 4 ## Move byte (deref reg + immediate offset byte) into reg

54
extra/dss/extmov_unit_tests.dss
View file

@ -413,7 +413,8 @@ test_18_passed:
mov R1, 0x9000 mov R1, 0x9000
mov R3, 0xA000 mov R3, 0xA000
mov [0xA022], 0x66 mov [0xA022], 0x66
%low EXT_MOV wdreg_immoffw_in_dreg _R1 _R3 0x00 0x22 movo *R1, *R3, word 0x22
## %low EXT_MOV wdreg_immoffw_in_dreg _R1 _R3 0x00 0x22
mov ACC, *R1 mov ACC, *R1
jeq $test_19_passed, 0x66 jeq $test_19_passed, 0x66
push 0 push 0
@ -430,7 +431,8 @@ test_19_passed:
mov R3, 0xA000 mov R3, 0xA000
mov [0xA033], 0x77 mov [0xA033], 0x77
mov R2, 0x33 mov R2, 0x33
%low EXT_MOV wdreg_regoff_in_dreg _R1 _R3 _R2 movo *R1, *R3, R2
## %low EXT_MOV wdreg_regoff_in_dreg _R1 _R3 _R2
mov ACC, *R1 mov ACC, *R1
jeq $test_20_passed, 0x77 jeq $test_20_passed, 0x77
push 0 push 0
@ -446,7 +448,8 @@ test_20_passed:
mov R1, 0x9000 mov R1, 0x9000
mov R3, 0xA000 mov R3, 0xA000
mov [0xA044], 0x88 mov [0xA044], 0x88
%low EXT_MOV wdreg_immoffb_in_dreg _R1 _R3 0x44 movo *R1, *R3, 0x44
## %low EXT_MOV wdreg_immoffb_in_dreg _R1 _R3 0x44
mov ACC, *R1 mov ACC, *R1
jeq $test_21_passed, 0x88 jeq $test_21_passed, 0x88
push 0 push 0
@ -462,7 +465,8 @@ test_21_passed:
mov R1, 0xA000 mov R1, 0xA000
mov R3, 0xB000 mov R3, 0xB000
movb [0xB055], 0x99 movb [0xB055], 0x99
%low EXT_MOV bdreg_immoffw_in_dreg _R1 _R3 0x00 0x55 movbo *R1, *R3, word 0x55
## %low EXT_MOV bdreg_immoffw_in_dreg _R1 _R3 0x00 0x55
movb ACC, *R1 movb ACC, *R1
jeq $test_22_passed, 0x99 jeq $test_22_passed, 0x99
push 0 push 0
@ -479,7 +483,8 @@ test_22_passed:
mov R3, 0xB000 mov R3, 0xB000
movb [0xB066], 0xAA movb [0xB066], 0xAA
mov R2, 0x66 mov R2, 0x66
%low EXT_MOV bdreg_regoff_in_dreg _R1 _R3 _R2 movbo *R1, *R3, R2
## %low EXT_MOV bdreg_regoff_in_dreg _R1 _R3 _R2
movb ACC, *R1 movb ACC, *R1
jeq $test_23_passed, 0xAA jeq $test_23_passed, 0xAA
push 0 push 0
@ -495,7 +500,8 @@ test_23_passed:
mov R1, 0xA000 mov R1, 0xA000
mov R3, 0xB000 mov R3, 0xB000
movb [0xB077], 0xBB movb [0xB077], 0xBB
%low EXT_MOV bdreg_immoffb_in_dreg _R1 _R3 0x77 movbo *R1, *R3, 0x77
## %low EXT_MOV bdreg_immoffb_in_dreg _R1 _R3 0x77
movb ACC, *R1 movb ACC, *R1
jeq $test_24_passed, 0xBB jeq $test_24_passed, 0xBB
push 0 push 0
@ -509,7 +515,8 @@ test_24_passed:
## debug_break ## debug_break
inc R5 inc R5
mov [0xC088], 0xCC mov [0xC088], 0xCC
%low EXT_MOV wmem_immoffw_in_reg _R1 0xC0 0x00 0x00 0x88 movo R1, [0xC000], word 0x88
## %low EXT_MOV wmem_immoffw_in_reg _R1 0xC0 0x00 0x00 0x88
mov ACC, R1 mov ACC, R1
jeq $test_25_passed, 0xCC jeq $test_25_passed, 0xCC
push 0 push 0
@ -524,7 +531,8 @@ test_25_passed:
inc R5 inc R5
mov [0xC099], 0xDD mov [0xC099], 0xDD
mov R2, 0x99 mov R2, 0x99
%low EXT_MOV wmem_regoff_in_reg _R1 0xC0 0x00 _R2 movo R1, [0xC000], R2
## %low EXT_MOV wmem_regoff_in_reg _R1 0xC0 0x00 _R2
mov ACC, R1 mov ACC, R1
jeq $test_26_passed, 0xDD jeq $test_26_passed, 0xDD
push 0 push 0
@ -538,7 +546,8 @@ test_26_passed:
## debug_break ## debug_break
inc R5 inc R5
mov [0xC0AA], 0xEE mov [0xC0AA], 0xEE
%low EXT_MOV wmem_immoffb_in_reg _R1 0xC0 0x00 0xAA movo R1, [0xC000], 0xAA
## %low EXT_MOV wmem_immoffb_in_reg _R1 0xC0 0x00 0xAA
mov ACC, R1 mov ACC, R1
jeq $test_27_passed, 0xEE jeq $test_27_passed, 0xEE
push 0 push 0
@ -552,7 +561,8 @@ test_27_passed:
## debug_break ## debug_break
inc R5 inc R5
movb [0xD099], 0x11 movb [0xD099], 0x11
%low EXT_MOV bmem_immoffw_in_reg _R1 0xD0 0x00 0x00 0x99 movbo R1, [0xD000], word 0x99
## %low EXT_MOV bmem_immoffw_in_reg _R1 0xD0 0x00 0x00 0x99
mov ACC, R1 mov ACC, R1
jeq $test_28_passed, 0x11 jeq $test_28_passed, 0x11
push 0 push 0
@ -567,7 +577,8 @@ test_28_passed:
inc R5 inc R5
movb [0xD0AA], 0x22 movb [0xD0AA], 0x22
mov R2, 0xAA mov R2, 0xAA
%low EXT_MOV bmem_regoff_in_reg _R1 0xD0 0x00 _R2 movbo R1, [0xD000], R2
## %low EXT_MOV bmem_regoff_in_reg _R1 0xD0 0x00 _R2
mov ACC, R1 mov ACC, R1
jeq $test_29_passed, 0x22 jeq $test_29_passed, 0x22
push 0 push 0
@ -581,7 +592,8 @@ test_29_passed:
## debug_break ## debug_break
inc R5 inc R5
movb [0xD0BB], 0x33 movb [0xD0BB], 0x33
%low EXT_MOV bmem_immoffb_in_reg _R1 0xD0 0x00 0xBB movbo R1, [0xD000], 0xBB
## %low EXT_MOV bmem_immoffb_in_reg _R1 0xD0 0x00 0xBB
mov ACC, R1 mov ACC, R1
jeq $test_30_passed, 0x33 jeq $test_30_passed, 0x33
push 0 push 0
@ -596,7 +608,8 @@ test_30_passed:
inc R5 inc R5
mov R3, 0x4000 mov R3, 0x4000
mov [0x40CC], 0x44 mov [0x40CC], 0x44
%low EXT_MOV wdreg_immoffw_in_reg _R1 _R3 0x00 0xCC movo R1, *R3, word 0xCC
## %low EXT_MOV wdreg_immoffw_in_reg _R1 _R3 0x00 0xCC
mov ACC, R1 mov ACC, R1
jeq $test_31_passed, 0x44 jeq $test_31_passed, 0x44
push 0 push 0
@ -612,7 +625,8 @@ test_31_passed:
mov R3, 0x4000 mov R3, 0x4000
mov [0x40DD], 0x55 mov [0x40DD], 0x55
mov R2, 0xDD mov R2, 0xDD
%low EXT_MOV wdreg_regoff_in_reg _R1 _R3 _R2 movo R1, *R3, R2
## %low EXT_MOV wdreg_regoff_in_reg _R1 _R3 _R2
mov ACC, R1 mov ACC, R1
jeq $test_32_passed, 0x55 jeq $test_32_passed, 0x55
push 0 push 0
@ -627,7 +641,8 @@ test_32_passed:
inc R5 inc R5
mov R3, 0x4000 mov R3, 0x4000
mov [0x40EE], 0x66 mov [0x40EE], 0x66
%low EXT_MOV wdreg_immoffb_in_reg _R1 _R3 0xEE movo R1, *R3, 0xEE
## %low EXT_MOV wdreg_immoffb_in_reg _R1 _R3 0xEE
mov ACC, R1 mov ACC, R1
jeq $test_33_passed, 0x66 jeq $test_33_passed, 0x66
push 0 push 0
@ -642,7 +657,8 @@ test_33_passed:
inc R5 inc R5
mov R3, 0x5000 mov R3, 0x5000
movb [0x5011], 0x77 movb [0x5011], 0x77
%low EXT_MOV bdreg_immoffw_in_reg _R1 _R3 0x00 0x11 movbo R1, *R3, word 0x11
## %low EXT_MOV bdreg_immoffw_in_reg _R1 _R3 0x00 0x11
mov ACC, R1 mov ACC, R1
jeq $test_34_passed, 0x77 jeq $test_34_passed, 0x77
push 0 push 0
@ -658,7 +674,8 @@ test_34_passed:
mov R3, 0x5000 mov R3, 0x5000
movb [0x5022], 0x88 movb [0x5022], 0x88
mov R2, 0x22 mov R2, 0x22
%low EXT_MOV bdreg_regoff_in_reg _R1 _R3 _R2 movbo R1, *R3, R2
## %low EXT_MOV bdreg_regoff_in_reg _R1 _R3 _R2
mov ACC, R1 mov ACC, R1
jeq $test_35_passed, 0x88 jeq $test_35_passed, 0x88
push 0 push 0
@ -673,7 +690,8 @@ test_35_passed:
inc R5 inc R5
mov R3, 0x5000 mov R3, 0x5000
movb [0x5033], 0x99 movb [0x5033], 0x99
%low EXT_MOV bdreg_immoffb_in_reg _R1 _R3 0x33 movbo R1, *R3, 0x33
## %low EXT_MOV bdreg_immoffb_in_reg _R1 _R3 0x33
mov ACC, R1 mov ACC, R1
jeq $test_36_passed, 0x99 jeq $test_36_passed, 0x99
push 0 push 0

2
extra/dss/newTest.dss
View file

@ -10,8 +10,6 @@
$string "Hello World!!" $string "Hello World!!"
.code .code
debug_break
%low 0xE0 0x01
mov R10, 0x00 mov R10, 0x00
mov R9, $_text_entered_handler mov R9, $_text_entered_handler
mov R8, 0xA2 mov R8, 0xA2

6
extra/make_and_debug
View file

@ -17,11 +17,9 @@ if [ $? -eq 0 ]; then
/bin/bash ./load_mbr /bin/bash ./load_mbr
cd .. cd ..
printf "${green}Compiling Test Program...\n" printf "${green}Compiling Test Program...\n"
./dasm dss/extmov_unit_tests.dss -o extmov_unit_tests.bin --extmov --save-disassembly disassembly/extmov_unit_tests.dds --verbose ./dasm dss/newTest.dss -o newTest.bin --extmov --save-disassembly disassembly/newTest.dds --verbose
# ./dasm dss/newTest.dss -o newTest.bin --extmov --save-disassembly disassembly/newTest.dds --verbose
printf "\n${green}Running Application...\n\n${clear}" printf "\n${green}Running Application...\n\n${clear}"
./ddb config/testMachine.dvm --force-load extmov_unit_tests.bin 0x00 --verbose-load ./ddb config/testMachine.dvm --force-load newTest.bin 0x00 --verbose-load
# ./ddb config/testMachine.dvm --force-load newTest.bin 0x00 --verbose-load
cp dragon/disk1.dr ../extra/dragon/disk1.dr cp dragon/disk1.dr ../extra/dragon/disk1.dr
cp dragon/cmos.dr ../extra/dragon/cmos.dr cp dragon/cmos.dr ../extra/dragon/cmos.dr
fi fi

6
extra/make_and_run
View file

@ -17,11 +17,9 @@ if [ $? -eq 0 ]; then
/bin/bash ./load_mbr /bin/bash ./load_mbr
cd .. cd ..
printf "${green}Compiling Test Program...\n" printf "${green}Compiling Test Program...\n"
./dasm dss/extmov_unit_tests.dss -o extmov_unit_tests.bin --extmov --save-disassembly disassembly/extmov_unit_tests.dds --verbose ./dasm dss/newTest.dss -o newTest.bin --extmov --save-disassembly disassembly/newTest.dds --verbose
# ./dasm dss/newTest.dss -o newTest.bin --extmov --save-disassembly disassembly/newTest.dds --verbose
printf "\n${green}Running Application...\n\n${clear}" printf "\n${green}Running Application...\n\n${clear}"
./dvm config/testMachine.dvm --force-load extmov_unit_tests.bin 0x00 ./dvm config/testMachine.dvm --force-load newTest.bin 0x00
# ./dvm config/testMachine.dvm --force-load newTest.bin 0x00
cp dragon/disk1.dr ../extra/dragon/disk1.dr cp dragon/disk1.dr ../extra/dragon/disk1.dr
cp dragon/cmos.dr ../extra/dragon/cmos.dr cp dragon/cmos.dr ../extra/dragon/cmos.dr
fi fi

296
src/assembler/Assembler.cpp
View file

@ -1946,9 +1946,305 @@ namespace dragon
} }
else if (instEdit == "movo") else if (instEdit == "movo")
{ {
if (st.count() != 3)
{
std::cout << "Invalid operand number; " << line << "3 -> 3 required\n";
exit(0);
return;
}
eOperandType opType1 = parseOperand(st.next(), word1);
if (opType1 == eOperandType::Register)
{
m_code.push_back((uint8_t)word1);
code_offset++;
eOperandType opType2 = parseOperand(st.next(), word2);
ostd::String op3 = st.next();
bool word_offset = false;
if (op3.startsWith("word"))
{
op3.substr(4).trim();
word_offset = true;
}
eOperandType opType3 = parseOperand(op3, word3);
switch (opType2)
{
case eOperandType::DerefMemory:
m_code.push_back((uint8_t)((word2 & 0xFF00) >> 8));
m_code.push_back((uint8_t)(word2 & 0x00FF));
code_offset += 2;
break;
case eOperandType::DerefRegister:
m_code.push_back((uint8_t)word2);
code_offset++;
break;
default:
std::cout << "Invalid operand type; " << line << " (" << opEdit << ")\n";
exit(0);
break;
}
switch (opType3)
{
case eOperandType::Immediate:
case eOperandType::Label:
if (word_offset)
{
if (opType2 == eOperandType::DerefMemory)
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::wmem_immoffw_in_reg;
else if (opType2 == eOperandType::DerefRegister)
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::wdreg_immoffw_in_reg;
else
{
std::cout << "Invalid operand type; " << line << " (" << opEdit << ")\n";
exit(0);
}
m_code.push_back((uint8_t)((word3 & 0xFF00) >> 8));
m_code.push_back((uint8_t)(word3 & 0x00FF));
code_offset += 2;
}
else
{
if (opType2 == eOperandType::DerefMemory)
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::wmem_immoffb_in_reg;
else if (opType2 == eOperandType::DerefRegister)
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::wdreg_immoffb_in_reg;
else
{
std::cout << "Invalid operand type; " << line << " (" << opEdit << ")\n";
exit(0);
}
m_code.push_back((uint8_t)word3);
code_offset++;
}
break;
case eOperandType::Register:
if (opType2 == eOperandType::DerefMemory)
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::wmem_regoff_in_reg;
else if (opType2 == eOperandType::DerefRegister)
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::wdreg_regoff_in_reg;
else
{
std::cout << "Invalid operand type; " << line << " (" << opEdit << ")\n";
exit(0);
}
m_code.push_back((uint8_t)word3);
code_offset++;
break;
default:
std::cout << "Invalid operand type; " << line << " (" << opEdit << ")\n";
exit(0);
break;
}
}
else if (opType1 == eOperandType::DerefRegister)
{
m_code.push_back((uint8_t)word1);
code_offset++;
eOperandType opType2 = parseOperand(st.next(), word2);
ostd::String op3 = st.next();
bool word_offset = false;
if (op3.startsWith("word"))
{
op3.substr(4).trim();
word_offset = true;
}
eOperandType opType3 = parseOperand(op3, word3);
switch (opType2)
{
case eOperandType::DerefRegister:
m_code.push_back((uint8_t)word2);
code_offset++;
break;
default:
std::cout << "Invalid operand type; " << line << " (" << opEdit << ")\n";
exit(0);
break;
}
switch (opType3)
{
case eOperandType::Immediate:
case eOperandType::Label:
if (word_offset)
{
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::wdreg_immoffw_in_dreg;
m_code.push_back((uint8_t)((word3 & 0xFF00) >> 8));
m_code.push_back((uint8_t)(word3 & 0x00FF));
code_offset += 2;
}
else
{
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::wdreg_immoffb_in_dreg;
m_code.push_back((uint8_t)word3);
code_offset++;
}
break;
case eOperandType::Register:
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::wdreg_regoff_in_dreg;
m_code.push_back((uint8_t)word3);
code_offset++;
break;
default:
std::cout << "Invalid operand type; " << line << " (" << opEdit << ")\n";
exit(0);
break;
}
}
else
{
std::cout << "Invalid operand type; " << line << " (" << opEdit << ") -> DerefRegister or Pointer required\n";
exit(0);
return;
}
} }
else if (instEdit == "movbo") else if (instEdit == "movbo")
{ {
if (st.count() != 3)
{
std::cout << "Invalid operand number; " << line << "3 -> 3 required\n";
exit(0);
return;
}
eOperandType opType1 = parseOperand(st.next(), word1);
if (opType1 == eOperandType::Register)
{
m_code.push_back((uint8_t)word1);
code_offset++;
eOperandType opType2 = parseOperand(st.next(), word2);
ostd::String op3 = st.next();
bool word_offset = false;
if (op3.startsWith("word"))
{
op3.substr(4).trim();
word_offset = true;
}
eOperandType opType3 = parseOperand(op3, word3);
switch (opType2)
{
case eOperandType::DerefMemory:
m_code.push_back((uint8_t)((word2 & 0xFF00) >> 8));
m_code.push_back((uint8_t)(word2 & 0x00FF));
code_offset += 2;
break;
case eOperandType::DerefRegister:
m_code.push_back((uint8_t)word2);
code_offset++;
break;
default:
std::cout << "Invalid operand type; " << line << " (" << opEdit << ")\n";
exit(0);
break;
}
switch (opType3)
{
case eOperandType::Immediate:
case eOperandType::Label:
if (word_offset)
{
if (opType2 == eOperandType::DerefMemory)
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::bmem_immoffw_in_reg;
else if (opType2 == eOperandType::DerefRegister)
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::bdreg_immoffw_in_reg;
else
{
std::cout << "Invalid operand type; " << line << " (" << opEdit << ")\n";
exit(0);
}
m_code.push_back((uint8_t)((word3 & 0xFF00) >> 8));
m_code.push_back((uint8_t)(word3 & 0x00FF));
code_offset += 2;
}
else
{
if (opType2 == eOperandType::DerefMemory)
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::bmem_immoffb_in_reg;
else if (opType2 == eOperandType::DerefRegister)
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::bdreg_immoffb_in_reg;
else
{
std::cout << "Invalid operand type; " << line << " (" << opEdit << ")\n";
exit(0);
}
m_code.push_back((uint8_t)word3);
code_offset++;
}
break;
case eOperandType::Register:
if (opType2 == eOperandType::DerefMemory)
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::bmem_regoff_in_reg;
else if (opType2 == eOperandType::DerefRegister)
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::bdreg_regoff_in_reg;
else
{
std::cout << "Invalid operand type; " << line << " (" << opEdit << ")\n";
exit(0);
}
m_code.push_back((uint8_t)word3);
code_offset++;
break;
default:
std::cout << "Invalid operand type; " << line << " (" << opEdit << ")\n";
exit(0);
break;
}
}
else if (opType1 == eOperandType::DerefRegister)
{
m_code.push_back((uint8_t)word1);
code_offset++;
eOperandType opType2 = parseOperand(st.next(), word2);
ostd::String op3 = st.next();
bool word_offset = false;
if (op3.startsWith("word"))
{
op3.substr(4).trim();
word_offset = true;
}
eOperandType opType3 = parseOperand(op3, word3);
switch (opType2)
{
case eOperandType::DerefRegister:
m_code.push_back((uint8_t)word2);
code_offset++;
break;
default:
std::cout << "Invalid operand type; " << line << " (" << opEdit << ")\n";
exit(0);
break;
}
switch (opType3)
{
case eOperandType::Immediate:
case eOperandType::Label:
if (word_offset)
{
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::bdreg_immoffw_in_dreg;
m_code.push_back((uint8_t)((word3 & 0xFF00) >> 8));
m_code.push_back((uint8_t)(word3 & 0x00FF));
code_offset += 2;
}
else
{
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::bdreg_immoffb_in_dreg;
m_code.push_back((uint8_t)word3);
code_offset++;
}
break;
case eOperandType::Register:
m_code[m_code.size() - code_offset] = hw::cpuext::ExtMov::OpCodes::bdreg_regoff_in_dreg;
m_code.push_back((uint8_t)word3);
code_offset++;
break;
default:
std::cout << "Invalid operand type; " << line << " (" << opEdit << ")\n";
exit(0);
break;
}
}
else
{
std::cout << "Invalid operand type; " << line << " (" << opEdit << ") -> DerefRegister or Pointer required\n";
exit(0);
return;
}
} }
else else
{ {